ARM Assembly (32-bit) Cheat Sheet

+----------------------+ | Common Sections | +----------------------+

.section .text       ; Executable code
.section .data       ; Initialized global variables
.section .bss        ; Block Started by Symbol (uninitialized data)
.space N             ; Reserve N bytes of space (used in .data or .bss)
.skip N              ; Alias for .space in GNU assembler

+----------------+ | Registers | +----------------+

+----------------------+ | Arithmetic & Logic | +----------------------+

ADD  R0, R1, #5       ; R0 = R1 + 5
ADDS R0, R1, R2       ; Same as ADD, updates flags
SUB  R0, R1, R2       ; R0 = R1 - R2
SUBS R0, R1, R2       ; Same as SUB, updates flags
MOV  R0, #10          ; R0 = 10
MUL  R0, R1, R2       ; R0 = R1 * R2
AND  R0, R1, R2       ; R0 = R1 AND R2
ORR  R0, R1, R2       ; R0 = R1 OR R2
EOR  R0, R1, R2       ; R0 = R1 XOR R2
MVN  R0, R1           ; R0 = NOT R1
RSB  R0, R1, #0       ; R0 = -R1 (Reverse subtract)

+--------------------------+ | Comparison & Branching | +--------------------------+

CMP R0, #10          ; Compare R0 with 10 (sets flags)
CMN R0, R1           ; Compare Negative (R0 + R1)
TST R0, R1           ; Bitwise AND test (no result, sets flags)
TEQ R0, R1           ; Bitwise XOR test (no result, sets flags)

BEQ label            ; Branch if equal (Z=1)
BNE label            ; Branch if not equal (Z=0)
BGT label            ; Branch if greater than (signed)
BLT label            ; Branch if less than (signed)
BGE label            ; Branch if >= (signed)
BLE label            ; Branch if <= (signed)
B label              ; Unconditional branch

+---------+ | Shifts | +---------+

LSL R1, R0, #2        ; Logical shift left (multiply by 4)
LSR R1, R0, #2        ; Logical shift right (unsigned divide by 4)
ASR R1, R0, #2        ; Arithmetic shift right (signed divide by 4)
ROR R1, R0, #4        ; Rotate right by 4 bits

+------------------+ | Memory Access | +------------------+

LDR R0, =label            ; Load address of label into R0
LDR R1, [R0]              ; Load value at address in R0
STR R1, [R0]              ; Store value in R1 to address in R0
LDR R2, [R0, R1, LSL #2]  ; Load arr[i] where R1 is index

+---------------------+ | Stack Operations | +---------------------+

PUSH {R4, R5, LR}         ; Save registers to stack
POP {R4, R5, LR}          ; Restore from stack
STMFD SP!, {R0-R3}        ; Store multiple full descending
LDMFD SP!, {R0-R3}        ; Load multiple full descending

+-----------------+ | Loop Example | +-----------------+

MOV R0, #0                  ; i = 0
LDR R1, =myarr             ; Load address of array
loop:
    CMP R0, #5             ; Compare i with 5
    BGE end                ; Exit if i >= 5
    LDR R2, [R1, R0, LSL #2] ; Load myarr[i] into R2
    ; Do something with R2
    ADD R0, R0, #1         ; i++
    B loop
end:

+--------------------------+ | Complex Example: Copy | +--------------------------+

.section .data
source:  .word 11, 22, 33, 44, 55

.section .bss
copy:    .space 20          ; Reserve space for 5 words

.section .text
.global _start
_start:
    LDR R0, =source        ; R0 = src address
    LDR R1, =copy          ; R1 = dst address
    MOV R2, #5             ; counter = 5

loop_copy:
    CMP R2, #0
    BEQ done
    LDR R3, [R0], #4       ; R3 = *R0; R0 += 4
    STR R3, [R1], #4       ; *R1 = R3; R1 += 4
    SUB R2, R2, #1
    B loop_copy

done:
    MOV R7, #1             ; exit
    MOV R0, #0
    SWI 0

+------------------------+ | Print String (Linux) | +------------------------+

.data
msg: .asciz "Hello, ARM!\\n"
.text
.global _start
_start:
    LDR R0, =msg       ; pointer to message
    MOV R1, R0         ; arg1: message
    MOV R2, #12        ; arg2: message length
    MOV R7, #4         ; syscall: write
    MOV R0, #1         ; file descriptor: stdout
    SWI 0              ; perform syscall
    MOV R7, #1         ; syscall: exit
    MOV R0, #0         ; exit code
    SWI 0

+------------+ | Flag Codes | +------------+